Wired for Resilience: Transatlantic Approaches to Semiconductor Supply Chain Security
Semiconductors, the bedrock of modern economies, have vaulted from niche concern to the centre stage of economic security policy amid the intensifying United States–China technology rivalry. Caught in the middle is the global semiconductor ecosystem, intricately interdependent and now geopolitically exposed. The central policy question is how can the United States and its allies de-risk and diversify without succumbing to techno-nationalist overreach? Securing semiconductor resilience is not a zero-sum nationalist arms race. It is a positive-sum coordination challenge. The United States and Europe must act not just in parallel but in concert – aligning incentives, investing in complementary nodes, and preparing for contingencies around Taiwan and other flashpoints.
Revised version of a paper presented at the IAI Transatlantic Symposium 2024–25, held in Rome on 9 May 2025.
iaip2512.pdf [3]-
Details
Rome, IAI, June 2025, 19 p. -
In:
IAI Papers [2] -
Issue
25|12 -
ISBN/ISSN/DOI:
978-88-9368-365-4
Introduction
1. Mapping the semiconductor supply chain: Advanced vs legacy chips
1.1 Design and IP: The United States’ edge
1.2 Fabrication: Differs by node
1.3 Equipment and materials: Transatlantic and allied strength
1.4 Strategic takeaways
2. The US semiconductor resilience strategy: The sword and the shield
2.1 The CHIPS Act: Big money, big bets
2.2 Beyond the giants: Tacking the legacy chips problem
2.3 Export controls: Buying time by kneecapping rivals
2.4 Trade enforcement: Tariffs and Section 232/301 hammer
2.5 Gaps, risks and the Trump factor
3. Transatlantic semiconductor cooperation: What’s realistic, what’s necessary
3.1 Aligning incentives without fighting over the same fabs
3.2 Keeping the export controls front aligned
3.3 Crisis coordination: Early warning, not empty summits
3.4 Joint R&D and standards: Quiet wins, not grandiose pledges
3.5 Co-investment mechanisms: A semiconductor venture fund
3.6 Practical recommendations
4. Conclusion: A resilience architecture for an uncertain era
List of acronyms
References